Archictecture of a microprocessor and the Simple As Possible 1 (SAP1)

The following are the characteristics of a microcomputer:

• an address bus (that may be 8, 16 or 32 bits wide) that sends an address to memory
• a data bus (that may be 8, 16 or 32 bits wide) that can send data to memory or receive data from memory
• a RD (Read) and WR (Write) line to tell the memory whether it wants to set or get the addressed location
• a clock line that lets a clock pulse sequence the processor
• a reset line that resets the program counter to zero (or whatever) and restarts execution

The features in SAP-1 computer are:

• W bus - A single 8 bit bus for address and data transfer.
• 16 Bytes memory (RAM)
• Registers are accumulator and B-register each of 8 bits.
• Program counter – initializes from 00H(0d) to FFH(15d) during program execution.
• Memory Address Register (MAR) to store memory addresses.
• Adder/Subtracter for addition and subtraction instructions.
• A Control Unit
• A Simple Output.
• 6 machine reserved for each instruction.

SAP Architecture

1. Program Counter (PC)

• It counts from 0000 to 1111 and it signals the memory address of next instruction to be fetched and executed

2. Input and MAR (MAR)

• During a computer run, the address in PC is latched into Memory Address Register (MAR).

3. RAM

• the program code to be executed and data for SAP1 computer is stored here.

• During a computer run, the RAM receives 4-bit addresses from MAR and a read operation is performed. Hence, the instruction or data word stored in RAM is placed on the W bus for use by some other part of the computer.

• It is asynchronous RAM, which means that the output data is available as soon as valid address and control signal are applied

4. Instruction Register (IR)

• IR contains the instruction (composed of OPCODE+ADDRESS) to be executed by SAP1 computer.

5. Controller- Sequencer

• it generates the control signals for each block so that actions occur in desired sequence. CLK signal is used to synchronize the overall operation of the SAP1 computer.

• A 12 bit word comes out of the Controller-Sequencer block. This control word determines how the registers will react to the next positive CLK edge.

6. Accumulator

• it is a 8 bit buffer register that stores intermediate results during a computer run.

• It is always one of the operands of ADD,SUB and OUT instructions.

7. Adder-Subtracter

• it is a 2's complement adder-subtractor

• this module is asynchronous (unclocked), which means that its contents can change as soon as the input words change

8. B Register

• it is 8 bit buffer register which is primarily used to hold the other operand (one operand is always accumulator) of mathematical operations.

9. Output Register

• this registers hold the output of OUT instruction.

10. Binary Display

• it is a row of eight LEDs to show the contents of output register.